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DATE
1999
IEEE
115views Hardware» more  DATE 1999»
15 years 10 months ago
EXPRESSION: A Language for Architecture Exploration through Compiler/Simulator Retargetability
We describe EXPRESSION, a language supporting architectural design space exploration for embedded Systems-onChip (SOC) and automatic generation of a retargetable compiler/simulato...
Ashok Halambi, Peter Grun, Vijay Ganesh, Asheesh K...
FPGA
2000
ACM
177views FPGA» more  FPGA 2000»
15 years 9 months ago
Automatic generation of FPGA routing architectures from high-level descriptions
In this paper we present a "high-level" FPGA architecture description language which lets FPGA architects succinctly and quickly describe an FPGA routing architecture. W...
Vaughn Betz, Jonathan Rose
CODES
2006
IEEE
15 years 12 months ago
Generic netlist representation for system and PE level design exploration
Designer productivity and design predictability are vital factors for successful embedded system design. Shrinking time-to-market and increasing complexity of these systems requir...
Bita Gorjiara, Mehrdad Reshadi, Pramod Chandraiah,...
CODES
1997
IEEE
15 years 10 months ago
Software Architecture Synthesis for Retargetable Real-time Embedded Systems
– Retargetability of embedded system descriptions not only enables better exploration of the design space and evaluation of cost/performance tradeoffs but also enhances design ma...
Pai H. Chou, Gaetano Borriello
DATE
2009
IEEE
120views Hardware» more  DATE 2009»
16 years 19 days ago
Towards a formal semantics for the AADL behavior annex
—AADL is an Architecture Description Language which describes embedded real-time systems. Behavior annex is an extension of the dispatch mechanism of AADL execution model. This p...
Zhibin Yang, Kai Hu, Dianfu Ma, Lei Pi