Sciweavers

1379 search results - page 95 / 276
» Elements of low power design for integrated systems
Sort
View
CODES
2005
IEEE
15 years 8 months ago
An efficient direct mapped instruction cache for application-specific embedded systems
Caches may consume half of a microprocessor’s total power and cache misses incur accessing off-chip memory, which is both time consuming and energy costly. Therefore, minimizing...
Chuanjun Zhang
IPPS
1998
IEEE
15 years 10 months ago
Tailoring UNITY to Distributed Program Design
As a general framework, UNITY does not offer any specific facility for the design of distributed systems. For such systems, distribution aspects must be represented at a low level,...
Michel Charpentier, Mamoun Filali, Philippe Mauran...
IWCMC
2006
ACM
16 years 10 days ago
Budgeting power: packet duplication and bit error rate reduction in wireless ad-hoc networks
In this paper we present and evaluate a new technique to lower packet-level error rates of application layer connections in wireless ad-hoc networks. In our scheme, data packets s...
Ghassen Ben Brahim, Bilal Khan
ISVLSI
2005
IEEE
101views VLSI» more  ISVLSI 2005»
15 years 12 months ago
eWatch: Context Sensitive System Design Case Study
In this paper, we introduce a novel context sensitive system design paradigm. Multiple sensors/ computational architecture, in the form of our eWatch device, is used to infer the ...
Asim Smailagic, Daniel P. Siewiorek, Uwe Maurer, A...
GLOBECOM
2006
IEEE
16 years 13 days ago
Integrated Data Delivery and Interest Dissemination Techniques for Wireless Sensor Networks
— The paper presents IRIS, an Integrated Routing and Interest dissemination System for wireless sensor networks. The proposed protocols are designed to work under very low duty c...
Michele Mastrogiovanni, Chiara Petrioli, Michele R...