An effective technique to save power during scan based test is to switch off unused scan chains. The results obtained with this method strongly depend on the mapping of scan flip-...
Christian G. Zoellin, Hans-Joachim Wunderlich, Jen...
Current Static Timing Analysis (STA) techniques allow one to verify the timing of a circuit at different process corners which only consider cases where all the supplies are low o...
To transplant the six characteristics of traditional collaborative learning into the network collaborative learning environment, this paper proposes the design of an Internet coll...
Fu-Chien Kao, Chia-Wei Liu, Zhi-Hua Ji, Chia-Liang...
Abstract. Blue Gene/L uses a large number of low power processors, together with multiple integrated interconnection networks, to build a supercomputer with low cost, space and pow...
George S. Almasi, Gyan Bhanot, Dong Chen, Maria El...
Adding a small loop cache to a microprocessor has been shown to reduce average instruction fetch energy for various sets of embedded system applications. With the advent of core-b...