1379 search results - page 188 / 276 » Elements of low power design for integrated systems |
147
click to vote
ISCA
2008
IEEE
16 years 24 days ago
2008
IEEE
Multicore processors have emerged as a powerful platform on which to efficiently exploit thread-level parallelism (TLP). However, due to Amdahl’s Law, such designs will be incr...
150
click to vote
ISLPED
2005
ACM
15 years 12 months ago
2005
ACM
Tuning a configurable cache subsystem to an application can greatly reduce memory hierarchy energy consumption. Previous tuning methods use a level one configurable cache only, or...
157
click to vote
RTCSA
2005
IEEE
15 years 12 months ago
2005
IEEE
Battlefield surveillance often involves a high element of risk for military operators. Hence, it is very important for the military to execute unmanned surveillance by using larg...
166
click to vote
DAC
1998
ACM
16 years 7 months ago
1998
ACM
As VLSI circuit speeds have increased, reliable chip and system design can no longer be performed without accurate threedimensional interconnect models. In this paper, we describe...
185
click to vote
ISCA
2008
IEEE
15 years 6 months ago
2008
IEEE
Network-on-Chip (NoC) architectures have been adopted by a growing number of multi-core designs as a flexible and scalable solution to the increasing wire delay constraints in the...