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GLVLSI
2005
IEEE
122views VLSI» more  GLVLSI 2005»
16 years 12 days ago
Thermal aware cell-based full-chip electromigration reliability analysis
A hierarchical scheme with cells and modules is crucial for managing design complexity during a large integrated circuit design. We present a methodology for thermal aware cell-ba...
Syed M. Alam, Donald E. Troxel, Carl V. Thompson
ISORC
2005
IEEE
16 years 11 days ago
Model-Checking of Component-Based Event-Driven Real-Time Embedded Software
As complexity of real-time embedded software grows, it is desirable to use formal verification techniques to achieve a high level of assurance. We discuss application of model-ch...
Zonghua Gu, Kang G. Shin
ISORC
2005
IEEE
16 years 11 days ago
Proof Slicing with Application to Model Checking Web Services
Web Services emerge as a new paradigm for distributed computing. Model checking is an important verification method to ensure the trustworthiness of composite WS. abstraction and...
Hai Huang, Wei-Tek Tsai, Raymond A. Paul
ISQED
2005
IEEE
98views Hardware» more  ISQED 2005»
16 years 11 days ago
Wire Planning with Bounded Over-the-Block Wires
Hierarchical approach greatly facilitates large-scale chip design by hiding distracting details in low-level objects. However, the lowlevel designs have to have a global view of h...
Hua Xiang, I-Min Liu, Martin D. F. Wong
LCN
2005
IEEE
16 years 11 days ago
Automated Traffic Classification and Application Identification using Machine Learning
The dynamic classification and identification of network applications responsible for network traffic flows offers substantial benefits to a number of key areas in IP network engi...
Sebastian Zander, Thuy T. T. Nguyen, Grenville J. ...
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