544 search results - page 15 / 109 » Efficient checker processor design |
167
click to vote
DATE
2004
IEEE
15 years 9 months ago
2004
IEEE
Retargetable C compilers are key tools for efficient architecture exploration for embedded processors. In this paper we describe a novel approach to retargetable compilation based...
161
click to vote
ASPLOS
1992
ACM
15 years 10 months ago
1992
ACM
The foremost goal of superscalar processor design is to increase performance through the exploitation of instruction-level parallelism (ILP). Previous studies have shown that spec...
174
click to vote
DAC
1996
ACM
15 years 10 months ago
1996
ACM
Abstract -- This paper introduces a new HW/SW partitioning algorithm used in automating the instruction set processor design for pipelined ASIP (Application Specific Integrated Pro...
122
click to vote
DAC
2007
ACM
16 years 6 months ago
2007
ACM
The drive for low-power, high performance computation coupled with the extremely high design costs for ASIC designs, has driven a number of designers to try to create a flexible, ...
185
click to vote
CF
2006
ACM
15 years 9 months ago
2006
ACM
Traditionally, cache coherence in large-scale shared-memory multiprocessors has been ensured by means of a distributed directory structure stored in main memory. In this way, the ...