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DATE
2006
IEEE
104views Hardware» more  DATE 2006»
16 years 25 days ago
Pre-synthesis optimization of multiplications to improve circuit performance
Conventional high-level synthesis uses the worst case delay to relate all inputs to all outputs of an operation. This is a very conservative approximation of reality, especially i...
Rafael Ruiz-Sautua, María C. Molina, Jos&ea...
ETS
2006
IEEE
110views Hardware» more  ETS 2006»
16 years 25 days ago
Deterministic Logic BIST for Transition Fault Testing
BIST is an attractive approach to detect delay faults due to its inherent support for at-speed test. Deterministic logic BIST (DLBIST) is a technique which was successfully applie...
Valentin Gherman, Hans-Joachim Wunderlich, Jü...
ICCD
2006
IEEE
105views Hardware» more  ICCD 2006»
16 years 25 days ago
A New Class of Sequential Circuits with Acyclic Test Generation Complexity
—This paper introduces a new class of sequential circuits called acyclically testable sequential circuits which is wider than the class of acyclic sequential circuits but whose t...
Chia Yee Ooi, Hideo Fujiwara
ICSNC
2006
IEEE
16 years 24 days ago
Application Development in Vision-Enabled Wireless Sensor Networks
—Wireless networks in combination with image sensors open up a multitude of previously unthinkable sensing applications. Capable tools and testbeds for these wireless image senso...
Stephan Hengstler, Hamid K. Aghajan
TRIDENTCOM
2006
IEEE
16 years 23 days ago
WiSNAP: A wireless image sensor network application platform
—Wireless networks in combination with image sensors open up a multitude of previously unthinkable sensing applications. Capable tools and testbeds for these wireless image senso...
Stephan Hengstler, Hamid K. Aghajan