Conventional high-level synthesis uses the worst case delay to relate all inputs to all outputs of an operation. This is a very conservative approximation of reality, especially i...
BIST is an attractive approach to detect delay faults due to its inherent support for at-speed test. Deterministic logic BIST (DLBIST) is a technique which was successfully applie...
—This paper introduces a new class of sequential circuits called acyclically testable sequential circuits which is wider than the class of acyclic sequential circuits but whose t...
—Wireless networks in combination with image sensors open up a multitude of previously unthinkable sensing applications. Capable tools and testbeds for these wireless image senso...
—Wireless networks in combination with image sensors open up a multitude of previously unthinkable sensing applications. Capable tools and testbeds for these wireless image senso...