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DATE
2008
IEEE
103views Hardware» more  DATE 2008»
16 years 1 months ago
Novel Pin Assignment Algorithms for Components with Very High Pin Counts
The wiring effort and thus, the routability of electronic designs such as printed circuit boards, multi chip modules and single chip modules largely depends on the assignment of s...
Tilo Meister, Jens Lienig, Gisbert Thomke
DATE
2008
IEEE
101views Hardware» more  DATE 2008»
16 years 1 months ago
Resilient Dynamic Power Management under Uncertainty
With the increasing levels of variability and randomness in the characteristics and behavior of manufactured nanoscale structures and devices, achieving performance optimization u...
Hwisung Jung, Massoud Pedram
DATE
2008
IEEE
122views Hardware» more  DATE 2008»
16 years 1 months ago
Finding the Worst Voltage Violation in Multi-Domain Clock Gated Power Network
This paper proposes an efficient method to find the worst case of voltage violation by multi-domain clock gating in an on-chip power network. We first present a voltage response i...
Wanping Zhang, Yi Zhu, Wenjian Yu, Ling Zhang, Rui...
DDECS
2008
IEEE
185views Hardware» more  DDECS 2008»
16 years 1 months ago
Fast Boolean Minimizer for Completely Specified Functions
: We propose a simple and fast two-level minimization algorithm for completely specified functions in this paper. The algorithm is based on processing ternary trees. A ternary tree...
Petr Fiser, Pemysl Rucký, Irena Vanov&aacut...
DSD
2008
IEEE
187views Hardware» more  DSD 2008»
16 years 1 months ago
How to Live with Uncertainties: Exploiting the Performance Benefits of Self-Timed Logic In Synchronous Design
Ultra low power digital systems are key for any future wireless sensor nodes but also inside nomadic embedded systems (such as inside the digital front end of software defined rad...
Giacomo Paci, A. Nackaerts, Francky Catthoor, Luca...