2620 search results - page 336 / 524 » Efficient Hardware Voxelization |
157
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ICCAD
2003
IEEE
16 years 3 months ago
2003
IEEE
Dynamic voltage scaling (DVS) is arguably the most effective energy reduction technique. The multiple-voltage DVS systems, which can operate only at pre-determined discrete voltag...
169
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ICCAD
2002
IEEE
16 years 3 months ago
2002
IEEE
This work presents several new techniques for enhancing the performance of deterministic test pattern generation for VLSI circuits. The techniques introduced are called dynamic de...
167
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ICCAD
2001
IEEE
16 years 3 months ago
2001
IEEE
1 - This paper presents an efficient design exploration environment for high-end core processors. The heart of the proposed design exploration framework is a two-level simulation e...
174
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ISQED
2010
IEEE
16 years 1 months ago
2010
IEEE
With the CMOS transistors being scaled to sub 45nm and lower, Negative Bias Temperature Instability (NBTI) has become a major concern due to its impact on PMOS transistor aging pr...
207
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ISPD
2010
ACM
16 years 1 months ago
2010
ACM
Existing 3D placement techniques are mainly used for standardcell circuits, while mixed-size placement is needed to support highlevel functional units and intellectual property (I...