2620 search results - page 320 / 524 » Efficient Hardware Voxelization |
169
click to vote
IEEEPACT
2002
IEEE
15 years 11 months ago
2002
IEEE
Java exception checks are designed to ensure that any faulting instruction causing a hardware exception does not terminate the program abnormally. These checks, however, impose so...
157
click to vote
ICCAD
2000
IEEE
15 years 11 months ago
2000
IEEE
—As the complexity of digital filters is dominated by the number of multiplications, many works have focused on minimizing the complexity of multiplier blocks that compute the co...
198
click to vote
DATE
1998
IEEE
15 years 11 months ago
1998
IEEE
This paper presents a VLSI Architecture to implement the forward and inverse 2-D Discrete Wavelet Transform (FDWT/IDWT), to compress medical images for storage and retrieval. Loss...
165
click to vote
ISCA
1998
IEEE
15 years 11 months ago
1998
IEEE
Explicitly Parallel Instruction Computing (EPIC) architectures require the compiler to express program instruction level parallelism directly to the hardware. EPIC techniques whic...
169
click to vote
MICRO
1998
IEEE
15 years 11 months ago
1998
IEEE
We present an architecture that features dynamic multithreading execution of a single program. Threads are created automatically by hardware at procedure and loop boundaries and e...