The paper describes a specific method for designing selfchecking checkers for m-out-of-n codes. The method is oriented to the Field Programmable Gate Arrays technology and is base...
A. Matrosova, Vladimir Ostrovsky, Ilya Levin, K. N...
In this paper, we introduce a tile-graph-based approach to power planning. For a given flooplan solution, the power inputs are modeled into a tile graph, the minimum capacity of e...
Abstract - A comprehensive study of ultra high-speed currentmode logic (CML) buffers and regenerative CML latches will be illustrated. A new design procedure to systematically desi...
1 Product line engineering is usually a very beneficial, but sometimes also a very risky endeavor, as there is no guarantee for economic success. In this paper, we will describe an...
Eclipse is a heterogeneous multiprocessor architecture for high-performance media processing, including highdefinition MPEG encoding/decoding. The scalable architecture framework ...
Martijn J. Rutten, Jos T. J. van Eijndhoven, Evert...