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IOLTS
2003
IEEE
124views Hardware» more  IOLTS 2003»
16 years 7 hour ago
Designing FPGA based Self-Testing Checkers for m-out-of-n Codes
The paper describes a specific method for designing selfchecking checkers for m-out-of-n codes. The method is oriented to the Field Programmable Gate Arrays technology and is base...
A. Matrosova, Vladimir Ostrovsky, Ilya Levin, K. N...
ISCAS
2003
IEEE
113views Hardware» more  ISCAS 2003»
16 years 5 hour ago
Tile-graph-based power planning
In this paper, we introduce a tile-graph-based approach to power planning. For a given flooplan solution, the power inputs are modeled into a tile graph, the minimum capacity of e...
Jyh Perng Fang, Sao Jie Chen
ISCAS
2003
IEEE
331views Hardware» more  ISCAS 2003»
16 years 5 hour ago
Design of ultra high-speed CMOS CML buffers and latches
Abstract - A comprehensive study of ultra high-speed currentmode logic (CML) buffers and regenerative CML latches will be illustrated. A new design procedure to systematically desi...
Payam Heydari, Ravindran Mohanavelu
EUROMICRO
2002
IEEE
15 years 11 months ago
Developing, Validating and Evolving an Approach to Product Line Benefit and Risk Assessment
1 Product line engineering is usually a very beneficial, but sometimes also a very risky endeavor, as there is no guarantee for economic success. In this paper, we will describe an...
Klaus Schmid, Isabel John
IPPS
2002
IEEE
15 years 11 months ago
Eclipse: Heterogeneous Multiprocessor Architecture for Flexible Media Processing
Eclipse is a heterogeneous multiprocessor architecture for high-performance media processing, including highdefinition MPEG encoding/decoding. The scalable architecture framework ...
Martijn J. Rutten, Jos T. J. van Eijndhoven, Evert...