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DATE
2010
IEEE
129views Hardware» more  DATE 2010»
15 years 11 months ago
A power optimization method for CMOS Op-Amps using sub-space based geometric programming
—— A new sub-space max-monomial modeling scheme for CMOS transistors in sub-micron technologies is proposed to improve the modeling accuracy. Major electrical parameters of CMOS...
Wei Gao, Richard Hornsey
APCCAS
2002
IEEE
156views Hardware» more  APCCAS 2002»
15 years 11 months ago
Bit-plane watermarking for zerotree-coded images
In this paper, we develop a robust bit-plane watermarking technique based on zerotree coding. A robust watermark is an imperceptible but indelible code that can be used for owners...
Shih-Hsuan Yang, Hsin-Chang Chen
DATE
2002
IEEE
117views Hardware» more  DATE 2002»
15 years 11 months ago
Effective Software Self-Test Methodology for Processor Cores
Software self-testing for embedded processor cores based on their instruction set, is a topic of increasing interest since it provides an excellent test resource partitioning tech...
Nektarios Kranitis, Antonis M. Paschalis, Dimitris...
ISCAS
2002
IEEE
163views Hardware» more  ISCAS 2002»
15 years 11 months ago
A two-pass optimal motion-threading technique for 3D wavelet video coding
Motion-threading is a novel technique that can efficiently incorporate motion information into the 3D wavelet video coding. By utilizing shape adaptive wavelet transform along wit...
Lin Luo, Feng Wu, Shipeng Li, Zhenquan Zhuang, Ya-...
ASAP
2000
IEEE
90views Hardware» more  ASAP 2000»
15 years 11 months ago
Subword Permutation Instructions for Two-Dimensional Multimedia Processing in MicroSIMD Architectures
MicroSIMD architectures incorporating subword parallelism are very efficient for application-specific media processors as well as for fast multimedia information processing in gen...
Ruby B. Lee