2620 search results - page 303 / 524 » Efficient Hardware Voxelization |
156
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DATE
2009
IEEE
16 years 1 months ago
2009
IEEE
— MPSoC is evolving towards processor-pool (PP)-based architectures, which employ hierarchical on-chip network for inter- and intra-PP communication. Since the design space of PP...
193
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ISCAS
2008
IEEE
16 years 1 months ago
2008
IEEE
— Since the complexity of MIMO detection algorithms is exponential, the K–best algorithm is often chosen for efficient VLSI implementation. This detection problem is often view...
119
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ISCAS
2008
IEEE
16 years 1 months ago
2008
IEEE
Abstract—Since the xDSL specifications impose stringent linearity requirements to ensure the integrity of the data transferred, current line drivers use linear amplifiers. The do...
126
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DATE
2007
IEEE
16 years 1 months ago
2007
IEEE
This paper proposes an efficient test methodology to test switches in a Network-on-Chip (NoC) architecture. A switch in an NoC consists of a number of ports and a router. Using th...
167
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ISMVL
2007
IEEE
16 years 1 months ago
2007
IEEE
Designing modern circuits comprised of millions of gates is a very challenging task. Therefore new directions are investigated for efficient modeling and verification of such syst...