Sciweavers

2620 search results - page 295 / 524
» Efficient Hardware Voxelization
Sort
View
ASPDAC
2010
ACM
139views Hardware» more  ASPDAC 2010»
15 years 4 months ago
Fixed-outline thermal-aware 3D floorplanning
In this paper, we present a novel algorithm for 3D floorplanning with fixed outline constraints and a particular emphasis on thermal awareness. A computationally efficient thermal ...
Linfu Xiao, Subarna Sinha, Jingyu Xu, Evangeline F...
ICCAD
2010
IEEE
140views Hardware» more  ICCAD 2010»
15 years 4 months ago
Reduction of interpolants for logic synthesis
Craig Interpolation is a state-of-the-art technique for logic synthesis and verification, based on Boolean Satisfiability (SAT). Leveraging the efficacy of SAT algorithms, Craig In...
John D. Backes, Marc D. Riedel
ISLPED
2010
ACM
234views Hardware» more  ISLPED 2010»
15 years 4 months ago
Diet SODA: a power-efficient processor for digital cameras
Power has become the most critical design constraint for embedded handheld devices. This paper proposes a power-efficient SIMD architecture, referred to as Diet SODA, for DSP appl...
Sangwon Seo, Ronald G. Dreslinski, Mark Woh, Chait...
ISQED
2010
IEEE
137views Hardware» more  ISQED 2010»
15 years 4 months ago
Analysis of power supply induced jitter in actively de-skewed multi-core systems
This paper studies multi-core clock distribution using active deskewing methods. We propose an efficient methodology that uses Verilog-A to model PLLs, clock trees and power suppl...
Derek Chan, Matthew R. Guthaus
MICRO
2010
IEEE
149views Hardware» more  MICRO 2010»
15 years 4 months ago
ReMAP: A Reconfigurable Heterogeneous Multicore Architecture
This paper presents ReMAP, a reconfigurable architecture geared towards accelerating and parallelizing applications within a heterogeneous CMP. In ReMAP, threads share a common rec...
Matthew A. Watkins, David H. Albonesi