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PACS
2000
Springer
110views Hardware» more  PACS 2000»
15 years 10 months ago
Compiler-Directed Dynamic Frequency and Voltage Scheduling
Dynamic voltage and frequency scaling has been identified as one of the most effective ways to reduce power dissipation. This paper discusses a compilation strategy that identifies...
Chung-Hsing Hsu, Ulrich Kremer, Michael S. Hsiao
ASPDAC
1995
ACM
108views Hardware» more  ASPDAC 1995»
15 years 10 months ago
Transistor reordering rules for power reduction in CMOS gates
— The goal of transistor reordering for a logic gate is to reduce the propagation delay as well as the charging and discharging of internal capacitances to achieve low power cons...
Wen-Zen Shen, Jiing-Yuan Lin, Fong-Wen Wang
ICCD
1991
IEEE
65views Hardware» more  ICCD 1991»
15 years 10 months ago
Self-Timed Logic Using Current-Sensing Completion Detection (CSCD)
This article proposes a completion-detection method for efficiently implementing Boolean functions as self-timed logic structures. Current-Sensing Completion Detection, CSCD, allow...
Mark E. Dean, David L. Dill, Mark Horowitz
ARC
2010
Springer
128views Hardware» more  ARC 2010»
15 years 10 months ago
Reconfigurable Polyphase Filter Bank Architecture for Spectrum Sensing
Abstract. This paper presents a brief tutorial and background on implementing filter banks for spectrum sensing. It discusses the advantages of this approach over standard FFT-base...
Suhaib A. Fahmy, Linda Doyle
AICCSA
2008
IEEE
254views Hardware» more  AICCSA 2008»
15 years 8 months ago
Integrating software development security activities with agile methodologies
Because of several vulnerabilities in software products and high amount of damage caused by them, software developers are enforced to produce more secure systems. Software grows u...
Hossein Keramati, Seyed-Hassan Mirian-Hosseinabadi