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ASPDAC
2006
ACM
108views Hardware» more  ASPDAC 2006»
15 years 10 months ago
Spec-based flip-flop and latch repeater planning
Abstract-- Shrinking process geometries and frequency scaling give rise to an increasing number of interconnects that require multiple clock cycles. This paper explores efficient t...
Man Chung Hon
DATE
2004
IEEE
146views Hardware» more  DATE 2004»
15 years 10 months ago
Data Reuse Analysis Technique for Software-Controlled Memory Hierarchies
In multimedia and other streaming applications a significant portion of energy is spent on data transfers. Exploiting data reuse opportunities in the application, we can reduce th...
Ilya Issenin, Erik Brockmeyer, Miguel Miranda, Nik...
DATE
2004
IEEE
118views Hardware» more  DATE 2004»
15 years 10 months ago
SCORE: SPICE COmpatible Reluctance Extraction
Presently, a necessary modification to mainstream analysis tools prevents the direct application of reluctance k. In this paper, we propose a reluctance realization algorithm (RRA...
Rong Jiang, Charlie Chung-Ping Chen
CAV
2006
Springer
128views Hardware» more  CAV 2006»
15 years 10 months ago
Safraless Compositional Synthesis
In automated synthesis, we transform a specification into a system that is guaranteed to satisfy the specification. In spite of the rich theory developed for system synthesis, litt...
Orna Kupferman, Nir Piterman, Moshe Y. Vardi
DATE
2004
IEEE
164views Hardware» more  DATE 2004»
15 years 10 months ago
System Design Using Kahn Process Networks: The Compaan/Laura Approach
New emerging embedded system platforms in the realm of highthroughput multimedia, imaging, and signal processing will consist of multiple microprocessors and reconfigurable compon...
Todor Stefanov, Claudiu Zissulescu, Alexandru Turj...