2620 search results - page 266 / 524 » Efficient Hardware Voxelization |
145
click to vote
DATE
2006
IEEE
16 years 21 days ago
2006
IEEE
A concurrent core test approach is proposed to reduce the test cost of SOC. Multiple cores in SOC can be tested simultaneously by using a shared test set and scan chain disable. P...
147
click to vote
DDECS
2006
IEEE
16 years 21 days ago
2006
IEEE
: An embedded rectifier-based Built-In-Test (BIT) detection circuit for the RF integrated circuits is proposed in this work, and charge pump rectifier is adopted to transform the R...
147
click to vote
ICCAD
2006
IEEE
16 years 21 days ago
2006
IEEE
Designing asynchronous circuits by reusing existing synchronous tools has become a promising solution to the problem of poor CAD support in asynchronous world. A straightforward w...
123
click to vote
ISCAS
2006
IEEE
16 years 20 days ago
2006
IEEE
—This paper presents a high-performance CAVLC decoding VLSI architecture for MPEG-4 AVC/H.264. Instead of just skipping zero block, the proposed design explores the features of C...
157
click to vote
ISQED
2006
IEEE
16 years 20 days ago
2006
IEEE
This paper presents a unique SEU (single Event Upset) mitigation technique based upon Temporal Data Sampling for synchronous circuits and configuration bit storage for programmabl...