The programmable clock networks in FPGAs have a significant impact on overall power, area, and delay. Not only does the clock network itself dissipate a significant amount of powe...
Increasing demands upon embedded systems for higher level services like networking, user interfaces and file system management, are driving growth in fully-featured operating syst...
—Unknown protein sequences are often compared to a set of known sequences (a database scan) to detect functional similarities. Even though efficient dynamic programming algorithm...
Timothy F. Oliver, Bertil Schmidt, Douglas L. Mask...
Mark and sweep garbage collectors (GC) are classical but still very efficient automatic memory management systems. Although challenged by other kinds of systems, such as copying c...
Dominique Colnet, Philippe Coucaud, Olivier Zendra
Efficient inter-thread value communication is essential for improving performance in Thread-Level Speculation (TLS). Although several mechanisms for improving value communication ...
Antonia Zhai, Christopher B. Colohan, J. Gregory S...