2620 search results - page 235 / 524 » Efficient Hardware Voxelization |
160
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TC
2002
15 years 6 months ago
2002
Two architectures and VLSI implementations of the AES Proposal, Rijndael, are presented in this paper. These alternative architectures are operated both for encryption and decrypti...
185
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ISCAS
2007
IEEE
16 years 27 days ago
2007
IEEE
In this paper, an efficient VLSI architecture for a fast computation of the 2-D discrete wavelet transform (DWT) is proposed. The architecture employing a three-stage cascade in p...
145
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FPGA
2007
ACM
16 years 23 days ago
2007
ACM
A reconfigurable logic element (LE) is developed for use in constructing a NULL Convention Logic (NCL) FPGA. It can be configured as any of the 27 fundamental NCL gates, including...
145
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ASPDAC
2006
ACM
16 years 17 days ago
2006
ACM
To get efficient HW management in 2D Reconfigurable Systems, heuristics are needed to select the best place to locate each arriving task. We propose a technique that locates the ta...
165
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ISCAS
2005
IEEE
16 years 6 days ago
2005
IEEE
— A novel method to extract the efficient model for Metal-Oxide-Semiconductor (MOS) transistors in order to satisfy a specific accuracy is presented. The approach presented here ...