2620 search results - page 231 / 524 » Efficient Hardware Voxelization |
149
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ICCAD
1994
IEEE
15 years 10 months ago
1994
IEEE
For a logic design with level-sensitive latches, we need to validate timing signal paths which may flush through several latches. We developed efficient algorithms based on the mo...
173
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ARC
2007
Springer
15 years 10 months ago
2007
Springer
This paper presents the implementation of an environment for the evolution of one-dimensional cellular automata using a reconfigurable logic device. This configware is aimed at eva...
184
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ATVA
2009
Springer
15 years 10 months ago
2009
Springer
TAPAAL is a new platform independent tool for modelling, simulation and verification of timed-arc Petri nets. TAPAAL provides a stand-alone editor and simulator, while the verifica...
140
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ASPDAC
2007
ACM
15 years 10 months ago
2007
ACM
This paper presents a very efficient algorithm for performance-driven topology design for interconnects. Given a net, it first generates A-tree1 topology using table lookup and net...
170
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EUROCAST
2007
Springer
15 years 10 months ago
2007
Springer
Abstract. Pattern-based verification trying to abstract away the concrete number of repeated memory structures is one of the approaches that have recently been proposed for verific...