—The design of LTE turbo coding chain suitable for flexible parallel and pipelined hardware implementations is presented. The hierarchical data structure further offers an opport...
This paper presents a new approach that allows remote testing and diagnosis of complex (Systems-on-Chip) and embedded IP cores. The approach extends both on-chip design-for-test (...
This paper presents an effective approach to formally verify SystemC designs. The approach translates SystemC models into a Petri-Net based representation. The Petri-net model is ...
Abstract - A cell delay model based on rate-of-currentchange is presented, which accounts for the impact of the shape of the noisy waveform on the output voltage waveform. More pre...
—Our Mutation-based Validation Paradigm (MVP) is a validation environment for high-level microprocessor implementations. To be able to efficiently generate test sequences, we nee...