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ICCAD
1995
IEEE
163views Hardware» more  ICCAD 1995»
15 years 10 months ago
Signal integrity optimization on the pad assignment for high-speed VLSI design
Pad assignment with signal integrity optimization is very important for high-speed VLSI design. In this paper, an efficient method is proposed to effectively minimize both simulta...
Kai-Yuan Chao, D. F. Wong
ICCAD
1991
IEEE
76views Hardware» more  ICCAD 1991»
15 years 10 months ago
Flexible Block-Multiplier Generation
In a high level synthesis environment there is a strong need for flexible module generators. For the generation of regular structures efficient dedicated module generators can be ...
H. M. A. M. Arts, Jos T. J. van Eijndhoven, Leon S...
ICCAD
1991
IEEE
135views Hardware» more  ICCAD 1991»
15 years 10 months ago
DIATEST: A Fast Diagnostic Test Pattern Generator for Combinational Circuits
This paper presents an efficient algorithm for the generation of diagnostic test patterns which distinguish between two arbitrary single stuck-at faults. The algorithm is able to ...
Torsten Grüning, Udo Mahlstedt, Hartmut Koopm...
ASAP
2008
IEEE
119views Hardware» more  ASAP 2008»
15 years 8 months ago
An FPGA architecture for CABAC decoding in manycore systems
Arithmetic coding is an efficient entropy compression method that achieves results close to the entropy limit and it is used in modern standards such as JPEG-2000 and H.264. Arith...
Roberto R. Osorio, Javier D. Bruguera
ASPDAC
2005
ACM
96views Hardware» more  ASPDAC 2005»
15 years 8 months ago
Oscillation ring based interconnect test scheme for SOC
- We propose a novel oscillation ring (OR) test architecture for testing interconnects in SoC. In addition to stuck-at and open faults, this scheme can detect delay faults and cr...
Katherine Shu-Min Li, Chung-Len Lee, Chauchin Su, ...