Sciweavers

2620 search results - page 220 / 524
» Efficient Hardware Voxelization
Sort
View
DATE
2004
IEEE
144views Hardware» more  DATE 2004»
15 years 10 months ago
Cache-Aware Scratchpad Allocation Algorithm
In the context of portable embedded systems, reducing energy is one of the prime objectives. Most high-end embedded microprocessors include onchip instruction and data caches, alo...
Manish Verma, Lars Wehmeyer, Peter Marwedel
DSD
2004
IEEE
132views Hardware» more  DSD 2004»
15 years 10 months ago
Dynamic Filter Cache for Low Power Instruction Memory Hierarchy
Filter cache(FC) is effective in achieving energy saving at the expense of some performance degradation. The energy savings, here, comes from repeated execution of tiny loops from...
Kugan Vivekanandarajah, Thambipillai Srikanthan, S...
DDECS
2006
IEEE
146views Hardware» more  DDECS 2006»
15 years 10 months ago
Automatic Identification of Timing Anomalies for Cycle-Accurate Worst-Case Execution Time Analysis
Abstract-- Hard real-time systems need methods to determine upper bounds for their execution times, usually called worst-case execution times. Timing anomalies are counterintuitive...
Jochen Eisinger, Ilia Polian, Bernd Becker, Alexan...
AICCSA
2001
IEEE
200views Hardware» more  AICCSA 2001»
15 years 10 months ago
Location Management in Mobile Computing
This paper presents a novel approach based on clustering algorithms in combination with the location area (LA) scheme to solve the mobility management problem. Users' movemen...
Riky Subrata, Albert Y. Zomaya
ASPDAC
2001
ACM
73views Hardware» more  ASPDAC 2001»
15 years 10 months ago
Timed circuits: a new paradigm for high-speed design
Abstract-- In order to continue to produce circuits of increasing speeds, designers must consider aggressive circuit design styles such as self-resetting or delayed-reset domino ci...
Chris J. Myers, Wendy Belluomini, Kip Kallpack, Er...