2620 search results - page 219 / 524 » Efficient Hardware Voxelization |
245
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ISLPED
1996
ACM
15 years 10 months ago
1996
ACM
In this paper, we study the simultaneous buffer and wire sizing (SBWS) problem for delay and power dissipation minimization. We prove the BS/WS relation for optimal SBWS solutions...
170
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ASPDAC
2007
ACM
15 years 10 months ago
2007
ACM
With the emerging process variations in fabrication, the traditional corner-based timing optimization techniques become prohibitive. Buffer insertion is a very useful technique fo...
161
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ICCD
2007
IEEE
15 years 10 months ago
2007
IEEE
While Speculative Multithreading (SM) on a Chip Multiprocessor (CMP) has the ability to speed-up hard-toparallelize applications, the power inefficiency of aggressive speculation ...
179
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ARC
2006
Springer
15 years 10 months ago
2006
Springer
Abstract. This paper presents a novel partially reconfigurable FIR filter design that employs dynamic partial reconfiguration. Our scope is to implement a low-power, area-efficient...
161
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DATE
2004
IEEE
15 years 10 months ago
2004
IEEE
In this paper, we provide a flexible and automatic method to partition the functional space for efficient symbolic simulation. We utilize a 2-tuple list representation as the basi...