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ASAP
2004
IEEE
140views Hardware» more  ASAP 2004»
15 years 10 months ago
Decimal Floating-Point Division Using Newton-Raphson Iteration
Decreasing feature sizes allow additional functionality to be added to future microprocessors to improve the performance of important application domains. As a result of rapid gro...
Liang-Kai Wang, Michael J. Schulte
ARCS
2008
Springer
15 years 8 months ago
Synthesis of Multi-dimensional High-Speed FIFOs for Out-of-Order Communication
Due to increasing complexity of modern real-time image processing applications, classical hardware development at register transfer level becomes more and more the bottleneck of te...
Joachim Keinert, Christian Haubelt, Jürgen Te...
ERSA
2008
92views Hardware» more  ERSA 2008»
15 years 8 months ago
Implementation of a Multi-Context FPGA Based on Flexible-Context-Partitioning
This paper presents a novel architecture to increase the hardware utilization in multi-context field programmable gate arrays (MC-FPGAs). Conventional MC-FPGAs use dedicated tracks...
Hasitha Muthumala Waidyasooriya, Masanori Hariyama...
WSCG
2004
152views more  WSCG 2004»
15 years 8 months ago
Detection of Collisions and Self-collisions Using Image-space Techniques
Image-space techniques have shown to be very efficient for collision detection in dynamic simulation and animation environments. This paper proposes a new image-space technique for...
Bruno Heidelberger, Matthias Teschner, Markus H. G...
CRYPTO
2010
Springer
158views Cryptology» more  CRYPTO 2010»
15 years 7 months ago
Interactive Locking, Zero-Knowledge PCPs, and Unconditional Cryptography
Motivated by the question of basing cryptographic protocols on stateless tamper-proof hardware tokens, we revisit the question of unconditional two-prover zero-knowledge proofs fo...
Vipul Goyal, Yuval Ishai, Mohammad Mahmoody, Amit ...