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CARDIS
1998
Springer
141views Hardware» more  CARDIS 1998»
15 years 10 months ago
The Block Cipher Rijndael
In this paper we present the block cipher Rijndael, which is one of the fifteen candidate algorithms for the Advanced Encryption Standard (AES). We show that the cipher can be impl...
Joan Daemen, Vincent Rijmen
ISMVL
1994
IEEE
98views Hardware» more  ISMVL 1994»
15 years 10 months ago
Digital Circuit Verification Using Partially-Ordered State Models
Many aspects of digital circuit operation can be efficiently verified by simulating circuit operation over "weakened" state values. This technique has long been practice...
Carl-Johan H. Seger, Randal E. Bryant
DATE
2004
IEEE
132views Hardware» more  DATE 2004»
15 years 10 months ago
LZW-Based Code Compression for VLIW Embedded Systems
We propose a new variable-sized-block method for VLIW code compression. Code compression traditionally works on fixed-sized blocks and its efficiency is limited by the small block...
Chang Hong Lin, Yuan Xie, Wayne Wolf
ICCAD
1998
IEEE
79views Hardware» more  ICCAD 1998»
15 years 10 months ago
Reencoding for cycle-time minimization under fixed encoding length
This paper presents efficient reencoding and resynthesis algorithms for cycle-time minimization of multilevel implementations of synchronous finite state machines (FSMs) under a fi...
Balakrishnan Iyer, Maciej J. Ciesielski
FCCM
1995
IEEE
135views VLSI» more  FCCM 1995»
15 years 10 months ago
Architectural descriptions for FPGA circuits
FPGA-based synthesis tools require information about behaviour and architectural to make effective use of the limited number of cells typically available. A hardware description l...
Satnam Singh