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CODES
2000
IEEE
15 years 11 months ago
Memory architecture for efficient utilization of SDRAM: a case study of the computation/memory access trade-off
This paper discusses the trade-off between calculations and memory accesses in a 3D graphics tile renderer for visualization of data from medical scanners. The performance require...
Thomas Gleerup, Hans Holten-Lund, Jan Madsen, Stee...
FCCM
2004
IEEE
103views VLSI» more  FCCM 2004»
15 years 10 months ago
A Dynamically-Reconfigurable, Power-Efficient Turbo Decoder
The development of turbo codes has allowed for nearShannon limit information transfer in modern communication systems. Although turbo decoding is viewed as superior to alternate d...
Jian Liang, Russell Tessier, Dennis Goeckel
CLUSTER
2000
IEEE
15 years 10 months ago
Madeleine II: a Portable and Efficient Communication Library for High-Performance Cluster Computing
This paper introduces MadeleineII, a new adaptive and portable multi-protocol implementation of the Madeleine communication library. MadeleineII has the ability to control multipl...
Olivier Aumage, Luc Bougé, Alexandre Denis,...
DAC
2010
ACM
15 years 9 months ago
Efficient fault simulation on many-core processors
Fault simulation is essential in test generation, design for test and reliability assessment of integrated circuits. Reliability analysis and the simulation of self-test structure...
Michael A. Kochte, Marcel Schaal, Hans-Joachim Wun...
HIPEAC
2010
Springer
15 years 8 months ago
Virtual Ways: Efficient Coherence for Architecturally Visible Storage in Automatic Instruction Set Extensions
Abstract. Customizable processors augmented with application-specific Instruction Set Extensions (ISEs) have begun to gain traction in recent years. The most effective ISEs include...
Theo Kluter, Samuel Burri, Philip Brisk, Edoardo C...