One important part of a HW/SW codesign system is the scheduler which is needed in order to determine if a given HW/SW partitioning is suitable for a given application. In this pap...
An efficient deterministic BIST scheme based on partial scan chains together with a scan selection algorithm tailored for BIST is presented. The algorithm determines a minimum num...
For wireless mobile Internet users the length of the battery life is one of the most important performance factors. The energy efficiency of the data transmission over radio is a ...
Enrico Rantala, Arto Karppanen, Seppo Granlund, Pa...
In this paper, an efficient design flow integrating Mentor Graphics Precesion C and HDL designer is derived. In this hybrid prototyping environment, efficient FPGA architectures a...
Yuanbin Guo, Gang Xu, Dennis McCain, Joseph R. Cav...
Recently, a number of researchers have started to investigate new video-on-demand (VoD) architectures using batching, patching and periodic broadcasting. These architectures, comp...