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ESORICS
2006
Springer
15 years 10 months ago
Timing-Sensitive Information Flow Analysis for Synchronous Systems
Timing side channels are a serious threat to the security of cryptographic algorithms. This paper presents a novel method for the timing-sensitive analysis of information flow in s...
Boris Köpf, David A. Basin
MST
2010
117views more  MST 2010»
15 years 1 months ago
The 1-Versus-2 Queries Problem Revisited
The 1-versus-2 queries problem, which has been extensively studied in computational complexity theory, asks in its generality whether every efficient algorithm that makes at most 2...
Rahul Tripathi
ENTCS
2006
137views more  ENTCS 2006»
15 years 6 months ago
Compiling Esterel into Static Discrete-Event Code
Executing concurrent specifications on sequential hardware is important for both simulation of systems that are eventually implemented on concurrent hardware and for those most co...
Stephen A. Edwards, Vimal Kapadia, Michael Halasz
ISCAS
2008
IEEE
101views Hardware» more  ISCAS 2008»
16 years 26 days ago
High-performance ASIC implementations of the 128-bit block cipher CLEFIA
— In the present paper, we introduce high-performance hardware architectures for the 128-bit block cipher CLEFIA and evaluate their ASIC performances in comparison with the ISO/I...
Takeshi Sugawara, Naofumi Homma, Takafumi Aoki, Ak...
ISCAS
2005
IEEE
145views Hardware» more  ISCAS 2005»
16 years 2 days ago
SoC platform based design of MPEG-2/4 AAC audio decoder
—This paper presents a SoC platform based design for the implementation of AAC audio decoder. We present the approach not only for the characteristics of the algorithm, but also ...
Chun-Nan Liu, Tsung-Han Tsai