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ISCA
2006
IEEE
123views Hardware» more  ISCA 2006»
15 years 6 months ago
A Gracefully Degrading and Energy-Efficient Modular Router Architecture for On-Chip Networks
Packet-based on-chip networks are increasingly being adopted in complex System-on-Chip (SoC) designs supporting numerous homogeneous and heterogeneous functional blocks. These Net...
Jongman Kim, Chrysostomos Nicopoulos, Dongkook Par...
AC
2005
Springer
15 years 6 months ago
Power Analysis and Optimization Techniques for Energy Efficient Computer Systems
Reducing power consumption has become a major challenge in the design and operation of today's computer systems. This chapter describes different techniques addressing this c...
Wissam Chedid, Chansu Yu, Ben Lee
SIGMETRICS
2010
ACM
131views Hardware» more  SIGMETRICS 2010»
15 years 1 months ago
Energy efficient management of two cellular access networks
In this paper we evaluate the energy saving that can be achieved with the energy-aware cooperative management of the cellular access networks of two operators offering service ove...
Marco Ajmone Marsan, Michela Meo
TVLSI
2010
15 years 1 months ago
A Reverse-Encoding-Based On-Chip Bus Tracer for Efficient Circular-Buffer Utilization
Hardware debuggers and logic analyzers must be able to record a continuous trace of data. Since the trace data are tremendous, to save space, these traces are often compressed. The...
Fu-Ching Yang, Cheng-Lung Chiang, Ing-Jer Huang
FPL
2003
Springer
120views Hardware» more  FPL 2003»
15 years 11 months ago
Power-Efficient Implementations of Multimedia Applications on Reconfigurable Platforms
The power-efficient implementation of motion estimation algorithms on a system comprised by an FPGA and an external memory is presented. Low power consumption is achieved by implem...
Konstantinos Tatas, K. Siozios, Dimitrios Soudris,...