1521 search results - page 82 / 305 » Efficient Design Validation Based on Cultural Algorithms |
172
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DAC
2002
ACM
16 years 7 months ago
2002
ACM
The ability to compute the parasitic inductance of the interconnect is critical to the timing verification of modern VLSI circuits. A challenging aspect of inductance extraction i...
170
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CDC
2010
IEEE
15 years 1 months ago
2010
IEEE
In this paper the problem of positioning a team of mobile robots for a surveillance task in a non-convex environment with obstacles is considered. The robots are equipped with glob...
151
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GLVLSI
2009
IEEE
15 years 10 months ago
2009
IEEE
Recent technology mappers for LUT based FPGAs employ cut enumeration. Although many cuts are often needed to nd good network, enumerating all cuts with large size consumes run-tim...
162
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GECCO
2007
Springer
16 years 10 days ago
2007
Springer
Engineering design increasingly uses computer simulation models coupled with optimization algorithms to find the best design that meets the customer constraints within a time con...
176
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COMPGEOM
2001
ACM
15 years 9 months ago
2001
ACM
This presentation illustrates examples of my geometric sculpture and outlines certain design techniques. I apply methods from the field of computational geometry to the creation o...