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ISCAS
2005
IEEE
126views Hardware» more  ISCAS 2005»
16 years 7 days ago
Scheduling algorithm for partially parallel architecture of LDPC decoder by matrix permutation
— The fully parallel LDPC decoding architecture can achieve high decoding throughput, but it suffers from large hardware complexity caused by a large set of processing units and ...
In-Cheol Park, Se-Hyeon Kang
QSIC
2005
IEEE
16 years 7 days ago
Replication for Adaptive Responsiveness in Service-Oriented Systems
A major advantage of Service-Oriented Architecture (SOA) is the ability to enable rapid formation of large-scale distributed systems. A dominant factor for the success of service-...
Stephen S. Yau, Gaurav Goyal, Yisheng Yao
SBCCI
2005
ACM
80views VLSI» more  SBCCI 2005»
16 years 6 days ago
On the design of very small transconductance OTAs with reduced input offset
In this paper it will be demonstrated, from the theory and measurements, that series-parallel (SP) mirrors allow building current copiers with copy factors of thousands, without d...
Alfredo Arnaud, Rafaella Fiorelli, Carlos Galup-Mo...
189
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SOFTVIS
2005
ACM
16 years 6 days ago
CVSscan: visualization of code evolution
During the life cycle of a software system, the source code is changed many times. We study how developers can be enabled to get insight in these changes, in order to understand t...
Lucian Voinea, Alexandru Telea, Jarke J. van Wijk
ACIVS
2005
Springer
16 years 6 days ago
Identification of Intestinal Motility Events of Capsule Endoscopy Video Analysis
Abstract. Purpose: To develop a system for assisting the analysis of capsuleendoscopy (CE) video data and identifying sequences of frames related to small intestine motility. Mater...
Panagiota Spyridonos, Fernando Vilariño, Jo...