1156 search results - page 175 / 232 » Efficient Barriers for Distributed Shared Memory Computers |
166
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IPPS
1998
IEEE
15 years 10 months ago
1998
IEEE
In this paper the problem of fault-tolerant message routing in two-dimensional meshes, with each inner node having 4 neighbors, is investigated. It is assumed that some nodes/links...
189
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PDP
2010
IEEE
16 years 26 days ago
2010
IEEE
—This work presents a study undertaken to characterise the behaviour of some parallelisation techniques for irregular codes, previously developed for SMP architectures, on a seve...
184
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PADS
2006
ACM
15 years 12 months ago
2006
ACM
A master/worker paradigm for executing large-scale parallel discrete event simulation programs over networkenabled computational resources is proposed and evaluated. In contrast t...
152
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PPOPP
2009
ACM
16 years 6 months ago
2009
ACM
Data prefetching has been widely used in the past as a technique for hiding memory access latencies. However, data prefetching in multi-threaded applications running on chip multi...
144
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SPAA
2006
ACM
15 years 12 months ago
2006
ACM
We present a technique for analyzing the number of cache misses incurred by multithreaded cache oblivious algorithms on an idealized parallel machine in which each processor has a...