4924 search results - page 583 / 985 » Efficiency Improvement for NTRU |
152
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ICCD
1994
IEEE
15 years 11 months ago
1994
IEEE
Systems for multi-level logic optimization are usually based on a set of specialized, loosely-related transformations which work on a network representation. The sequence of trans...
160
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INFOCOM
1993
IEEE
15 years 11 months ago
1993
IEEE
Over the last decade Internet has grown by orders of magnitude in size. Many of the protocols that were designed several years ago are still in use. It is not clear if the assumpt...
175
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ICCAL
1989
15 years 11 months ago
1989
Signal constellation design is a major subtask of constructing an efficient communication system; it essentially entails trading-off error frequency against information throughput...
109
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ASAP
2007
IEEE
15 years 10 months ago
2007
IEEE
Dynamic reconfiguration allows to selectively substitute blocks of logic at run-time in order to improve the area efficiency of a FPGA design. This paper presents the design of a ...
167
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ASPDAC
2007
ACM
15 years 10 months ago
2007
ACM
Factoring is a logic minimization technique to represent a Boolean function in an equivalent function with minimum literals. When realizing the circuit, a function represented in ...