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ISCAS
2003
IEEE
89views Hardware» more  ISCAS 2003»
15 years 12 months ago
Synthesizing checkers for on-line verification of System-on-Chip designs
In modern System-on-Chip (SoC) designs verification becomes the major bottleneck. Since by using state-of-theart techniques complete designs cannot be fully formally verified, it ...
Rolf Drechsler
MLDM
2009
Springer
15 years 11 months ago
Selection of Subsets of Ordered Features in Machine Learning
The new approach of relevant feature selection in machine learning is proposed for the case of ordered features. Feature selection and regularization of decision rule are combined ...
Oleg Seredin, Andrey Kopylov, Vadim Mottl
DAC
1994
ACM
15 years 10 months ago
BDD Variable Ordering for Interacting Finite State Machines
We address the problem of obtaining good variable orderings for the BDD representation of a system of interacting finite state machines (FSMs). Orderings are derived from the comm...
Adnan Aziz, Serdar Tasiran, Robert K. Brayton
LATIN
1992
Springer
15 years 10 months ago
On Reversible Automata
A reversible automaton is a finite (possibly incomplete) automaton in which each letter induces a partial one-to-one map from the set of states into itself. We give four non-trivi...
Jean-Eric Pin
ATVA
2006
Springer
153views Hardware» more  ATVA 2006»
15 years 10 months ago
Learning-Based Symbolic Assume-Guarantee Reasoning with Automatic Decomposition
Abstract. Compositional reasoning aims to improve scalability of verification tools by reducing the original verification task into subproblems. The simplification is typically bas...
Wonhong Nam, Rajeev Alur