Sciweavers

5493 search results - page 814 / 1099
» Effectively Polynomial Simulations
Sort
View
MICRO
1999
IEEE
143views Hardware» more  MICRO 1999»
15 years 11 months ago
Code Transformations to Improve Memory Parallelism
Current microprocessors incorporate techniques to exploit instruction-level parallelism (ILP). However, previous work has shown that these ILP techniques are less effective in rem...
Vijay S. Pai, Sarita V. Adve
MTDT
1999
IEEE
68views Hardware» more  MTDT 1999»
15 years 11 months ago
Unbalanced Cache Systems
The new concept of an unbalanced, hierarchicallydivided cache memory system is introduced and analyzed. This approach generalizes existing cache structures by allowing different m...
David L. Rhodes, Wayne Wolf
VISUALIZATION
1999
IEEE
15 years 11 months ago
A Multi-Threaded Streaming Pipeline Architecture for Large Structured Data Sets
Computer simulation and digital measuring systems are now generating data of unprecedented size. The size of data is becoming so large that conventional visualization tools are in...
C. Charles Law, Ken Martin, William J. Schroeder, ...
FCCM
1998
IEEE
148views VLSI» more  FCCM 1998»
15 years 11 months ago
JHDL - An HDL for Reconfigurable Systems
JHDL is a design tool for reconfigurable systems that allows designers to express circuit organizations that dynamically change over time in a natural way, using only standard pro...
Peter Bellows, Brad L. Hutchings
HPCA
1998
IEEE
15 years 11 months ago
Exploiting Two-Case Delivery for Fast Protected Messaging
We propose and evaluate two complementary techniques to protect and virtualize a tightly-coupled network interface in a multicomputer. The techniques allow efficient, direct appli...
Kenneth Mackenzie, John Kubiatowicz, Matthew Frank...