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ICCAD
1994
IEEE
131views Hardware» more  ICCAD 1994»
15 years 10 months ago
Edge-map: optimal performance driven technology mapping for iterative LUT based FPGA designs
We consider the problem of performance driven lookup-table (LUT) based technology mapping for FPGAs using a general delay model. In the general delay model, each interconnection e...
Hannah Honghua Yang, D. F. Wong
INFOCOM
1993
IEEE
15 years 10 months ago
A Generalized Processor Sharing Approach to Flow Control in Integrated Services Networks: The Multiple Node Case
Worst-casebounds on delay and backlog are derived for leaky bucket constrained sessions in arbitrary topology networks of Generalized Processor Sharing (GPS) 10] servers. The inhe...
Abhay K. Parekh, Robert G. Gallager
IWSSD
1993
IEEE
15 years 10 months ago
An Active Hypertext Model for System Requirements
We are developing tools to support a conversational metaphor for requirements definition and analysis. Our conversational model consists of three components: (1) a hypertextual re...
Colin Potts, Kenji Takahashi
PLDI
2010
ACM
15 years 10 months ago
Detecting Inefficiently-Used Containers to Avoid Bloat
Runtime bloat degrades significantly the performance and scalability of software systems. An important source of bloat is the inefficient use of containers. It is expensive to cre...
Guoqing Xu, Atanas Rountev
CHI
1993
ACM
15 years 10 months ago
Hyperspeech
HTTP provides a mechanism to connect web sites. Almost all sites have a large amount of hypertext content that provides connection to other sites in the World Wide Web. The succes...
Barry Arons
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