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IPCCC
1999
IEEE
15 years 10 months ago
Accurately modeling speculative instruction fetching in trace-driven simulation
Performance evaluation of modern, highly speculative, out-of-order microprocessors and the corresponding production of detailed, valid, accurate results have become serious challe...
R. Bhargava, L. K. John, F. Matus
CAV
1999
Springer
119views Hardware» more  CAV 1999»
15 years 10 months ago
A Theory of Restrictions for Logics and Automata
BDDs and their algorithms implement a decision procedure for Quanti ed Propositional Logic. BDDs are a kind of acyclic automata. Unrestricted automata (recognizing unbounded string...
Nils Klarlund
IPPS
1999
IEEE
15 years 10 months ago
A Graph Based Framework to Detect Optimal Memory Layouts for Improving Data Locality
In order to extract high levels of performance from modern parallel architectures, the effective management of deep memory hierarchies is very important. While architectural advan...
Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanuja...
IPPS
1999
IEEE
15 years 10 months ago
Hardwired-Clusters Partial-Crossbar: A Hierarchical Routing Architecture for Multi-FPGA Systems
Multi-FPGA systems (MFSs) are used as custom computing machines, logic emulators and rapid prototyping vehicles. A key aspect of these systems is their programmable routing archit...
Mohammed A. S. Khalid, Jonathan Rose
IPPS
1999
IEEE
15 years 10 months ago
Run-Time Selection of Block Size in Pipelined Parallel Programs
Parallelizing compiler technology has improved in recent years. One area in which compilers have made progress is in handling DOACROSS loops, where crossprocessor data dependencie...
David K. Lowenthal, Michael James
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