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ICS
1999
Tsinghua U.
15 years 10 months ago
Improving the performance of speculatively parallel applications on the Hydra CMP
Hydra is a chip multiprocessor (CMP) with integrated support for thread-level speculation. Thread-level speculation provides a way to parallelize sequential programs without the n...
Kunle Olukotun, Lance Hammond, Mark Willey
PACS
2000
Springer
99views Hardware» more  PACS 2000»
15 years 10 months ago
Dynamically Reconfiguring Processor Resources to Reduce Power Consumption in High-Performance Processors
Power dissipation is a major concern not only for portable systems, but also for high-performance systems. In the past, energy consumption and processor heating was reduced mainly...
Roberto Maro, Yu Bai, R. Iris Bahar
MJ
2007
87views more  MJ 2007»
15 years 5 months ago
Using SAT-based techniques in power estimation
Recent algorithmic advances in Boolean satisfiability (SAT), along with highly efficient solver implementations, have enabled the successful deployment of SAT technology in a wi...
Assim Sagahyroon, Fadi A. Aloul
TCS
2010
15 years 4 months ago
Non-cooperative facility location and covering games
Abstract. We study a general class of non-cooperative games coming from combinatorial covering and facility location problems. A game for k players is based on an integer programmi...
Jean Cardinal, Martin Hoefer
INFOCOM
2012
IEEE
13 years 8 months ago
Jointly optimal bit loading, channel pairing and power allocation for multi-channel relaying
Abstract—We aim to enhance the end-to-end rate of a general dual-hop relay network with multiple channels and finite modulation formats, by jointly optimizing channel pairing, p...
Mahdi Hajiaghayi, Min Dong, Ben Liang