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ASPDAC
2007
ACM
119views Hardware» more  ASPDAC 2007»
15 years 10 months ago
Optimum Prefix Adders in a Comprehensive Area, Timing and Power Design Space
Parallel prefix adder is the most flexible and widely-used binary adder for ASIC designs. Many high-level synthesis techniques have been developed to find optimal prefix structures...
Jianhua Liu, Yi Zhu, Haikun Zhu, Chung-Kuan Cheng,...
CASES
2007
ACM
15 years 10 months ago
Application driven embedded system design: a face recognition case study
The key to increasing performance without a commensurate increase in power consumption in modern processors lies in increasing both parallelism and core specialization. Core speci...
Karthik Ramani, Al Davis
DAC
2009
ACM
15 years 10 months ago
RegPlace: a high quality open-source placement framework for structured ASICs
Structured ASICs have recently emerged as an exciting alternative to ASIC or FPGA design style as they provide a new trade-off between the high performance of ASIC design and low ...
Ashutosh Chakraborty, Anurag Kumar, David Z. Pan
DATE
2009
IEEE
103views Hardware» more  DATE 2009»
15 years 10 months ago
Fault-tolerant average execution time optimization for general-purpose multi-processor system-on-chips
1 Fault-tolerance is due to the semiconductor technology development important, not only for safety-critical systems but also for general-purpose (non-safety critical) systems. How...
Mikael Väyrynen, Virendra Singh, Erik Larsson
HM
2007
Springer
155views Optimization» more  HM 2007»
15 years 10 months ago
A Hybrid ILS Heuristic to the Referee Assignment Problem with an Embedded MIP Strategy
Optimization in sports is a field of increasing interest. A novel problem in sports management is the Referee Assignment Problem, in which a limited number of referees with differe...
Alexandre R. Duarte, Celso C. Ribeiro, Sebasti&aac...