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CF
2009
ACM
16 years 1 months ago
A light-weight fairness mechanism for chip multiprocessor memory systems
Chip Multiprocessor (CMP) memory systems suffer from the effects of destructive thread interference. This interference reduces performance predictability because it depends heavil...
Magnus Jahre, Lasse Natvig
248
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EMSOFT
2004
Springer
16 years 12 hour ago
Binary translation to improve energy efficiency through post-pass register re-allocation
Energy efficiency is rapidly becoming a first class optimization parameter for modern systems. Caches are critical to the overall performance and thus, modern processors (both hig...
Kun Zhang, Tao Zhang, Santosh Pande
SIGCOMM
2004
ACM
16 years 1 days ago
An algebraic approach to practical and scalable overlay network monitoring
Overlay network monitoring enables distributed Internet applications to detect and recover from path outages and periods of degraded performance within seconds. For an overlay net...
Yan Chen, David Bindel, Han Hee Song, Randy H. Kat...
WSC
2007
15 years 9 months ago
Determining efficient simulation run lengths for real time decision making
Suppose that there are a number of alternative ways of operating a system, and a performance measure is available for comparing them. Simulation runs can be carried out to estimat...
Russell C. H. Cheng
HIPC
2007
Springer
16 years 23 days ago
Self-optimization of Performance-per-Watt for Interleaved Memory Systems
- With the increased complexity of platforms coupled with data centers’ servers sprawl, power consumption is reaching unsustainable limits. Memory is an important target for plat...
Bithika Khargharia, Salim Hariri, Mazin S. Yousif