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HPDC
2007
IEEE
16 years 1 months ago
A statistical approach to risk mitigation in computational markets
We study stochastic models to mitigate the risk of poor Quality-of-Service (QoS) in computational markets. Consumers who purchase services expect both price and performance guaran...
Thomas Sandholm, Kevin Lai
MICRO
2007
IEEE
150views Hardware» more  MICRO 2007»
16 years 1 months ago
Leveraging 3D Technology for Improved Reliability
Aggressive technology scaling over the years has helped improve processor performance but has caused a reduction in processor reliability. Shrinking transistor sizes and lower sup...
Niti Madan, Rajeev Balasubramonian
MICRO
2006
IEEE
145views Hardware» more  MICRO 2006»
16 years 27 days ago
ASR: Adaptive Selective Replication for CMP Caches
The large working sets of commercial and scientific workloads stress the L2 caches of Chip Multiprocessors (CMPs). Some CMPs use a shared L2 cache to maximize the on-chip cache c...
Bradford M. Beckmann, Michael R. Marty, David A. W...
HIPEAC
2009
Springer
15 years 11 months ago
Revisiting Cache Block Superloading
Abstract. Technological advances and increasingly complex and dynamic application behavior argue for revisiting mechanisms that adapt logical cache block size to application charac...
Matthew A. Watkins, Sally A. McKee, Lambert Schael...
CCGRID
2006
IEEE
15 years 10 months ago
A Feedback Mechanism for Network Scheduling in LambdaGrids
Next-generation e-Science applications will require the ability to transfer information at high data rates between distributed computing centers and data repositories. A LambdaGri...
Pallab Datta, Sushant Sharma, Wu-chun Feng
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