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PACS
2004
Springer
115views Hardware» more  PACS 2004»
15 years 12 months ago
Reducing Delay and Power Consumption of the Wakeup Logic Through Instruction Packing and Tag Memoization
Dynamic instruction scheduling logic is one of the most critical components of modern superscalar microprocessors, both from the delay and power dissipation standpoints. The delay ...
Joseph J. Sharkey, Dmitry Ponomarev, Kanad Ghose, ...
FPGA
1997
ACM
118views FPGA» more  FPGA 1997»
15 years 10 months ago
Module Generation of Complex Macros for Logic-Emulation Applications
Logic emulation is a technique that uses dynamically reprogrammable systems for prototyping and design veri cation. Using an emulator, designers can realize designs through a soft...
Wen-Jong Fang, Allen C.-H. Wu, Duan-Ping Chen
AMAST
2008
Springer
15 years 8 months ago
Service Specification and Matchmaking Using Description Logic
ed Abstract an extended abstract of [11]. Service-oriented computing is emerging as a new paradigm based on autonomous, platform-independent computational entities, called services...
M. Birna van Riemsdijk, Rolf Hennicker, Martin Wir...
TCAD
2008
101views more  TCAD 2008»
15 years 6 months ago
Using Field-Repairable Control Logic to Correct Design Errors in Microprocessors
Functional correctness is a vital attribute of any hardware design. Unfortunately, due to extremely complex architectures, widespread components, such as microprocessors, are often...
Ilya Wagner, Valeria Bertacco, Todd M. Austin
CORR
2004
Springer
137views Education» more  CORR 2004»
15 years 6 months ago
Implementation of Logical Functions in the Game of Life
: The Game of Life cellular automaton is a classical example of a massively parallel collision-based computing device. The automaton exhibits mobile patterns, gliders, and generato...
Jean-Philippe Rennard