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MICRO
2003
IEEE
152views Hardware» more  MICRO 2003»
16 years 16 hour ago
A Systematic Methodology to Compute the Architectural Vulnerability Factors for a High-Performance Microprocessor
Single-event upsets from particle strikes have become a key challenge in microprocessor design. Techniques to deal with these transient faults exist, but come at a cost. Designers...
Shubhendu S. Mukherjee, Christopher T. Weaver, Joe...
224
Voted
ISHPC
2003
Springer
15 years 12 months ago
Code and Data Transformations for Improving Shared Cache Performance on SMT Processors
Simultaneous multithreaded processors use shared on-chip caches, which yield better cost-performance ratios. Sharing a cache between simultaneously executing threads causes excessi...
Dimitrios S. Nikolopoulos
FCCM
2002
IEEE
127views VLSI» more  FCCM 2002»
15 years 11 months ago
Hardware-Assisted Fast Routing
To fully realize the benefits of partial and rapid reconfiguration of field-programmable devices, we often need to dynamically schedule computing tasks and generate instance-sp...
André DeHon, Randy Huang, John Wawrzynek
ICPR
2002
IEEE
15 years 11 months ago
Feature Extraction Methods Applied to the Clustering of Electrocardiographic Signals. A Comparative Study
In this paper, a method to automatically extract the main information from a long-term electrocardiographic signal is presented. This method is based on techniques of pattern reco...
David Cuesta-Frau, Juan Carlos Pérez-Cortes...
ISCAS
2002
IEEE
154views Hardware» more  ISCAS 2002»
15 years 11 months ago
Architectural approaches to reduce leakage energy in caches
In this paper, we present two methods to reduce leakage energy by dynamically resizing the cache during program execution. The first method monitors the miss rate of the individua...
S. H. Tadas, C. Chakrabarti