Sciweavers

4469 search results - page 405 / 894
» Dynamic Program Slicing
Sort
View
HIPC
2009
Springer
15 years 4 months ago
Fast checkpointing by Write Aggregation with Dynamic Buffer and Interleaving on multicore architecture
Large scale compute clusters continue to grow to ever-increasing proportions. However, as clusters and applications continue to grow, the Mean Time Between Failures (MTBF) has redu...
Xiangyong Ouyang, Karthik Gopalakrishnan, Tejus Ga...
VLSID
2004
IEEE
146views VLSI» more  VLSID 2004»
16 years 7 months ago
CMOS Circuit Design for Minimum Dynamic Power and Highest Speed
{A new low-power design method produces CMOS circuits that consume the least dynamic power at the highest speed permitted under the technology constraint. A gate is characterized b...
Tezaswi Raja, Vishwani D. Agrawal, Michael L. Bush...
ISCA
2009
IEEE
318views Hardware» more  ISCA 2009»
16 years 1 months ago
Thread criticality predictors for dynamic performance, power, and resource management in chip multiprocessors
With the shift towards chip multiprocessors (CMPs), exploiting and managing parallelism has become a central problem in computer systems. Many issues of parallelism management boi...
Abhishek Bhattacharjee, Margaret Martonosi
CF
2009
ACM
16 years 1 months ago
Scheduling dynamic parallelism on accelerators
Resource management on accelerator based systems is complicated by the disjoint nature of the main CPU and accelerator, which involves separate memory hierarhcies, different degr...
Filip Blagojevic, Costin Iancu, Katherine A. Yelic...
SIGCOMM
2009
ACM
16 years 1 months ago
A programmable, generic forwarding element approach for dynamic network functionality
Communication networks are growing exponentially, and new services and applications are being introduced unceasingly. To meet the demands of these services and applications, curre...
Ran Giladi, Niv Yemini