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ICCAD
1996
IEEE
119views Hardware» more  ICCAD 1996»
15 years 10 months ago
An algorithm for synthesis of system-level interface circuits
We describe an algorithm for the synthesis and optimization of interface circuits for embedded system components such as microprocessors, memory ASIC, and network subsystems with ...
Ki-Seok Chung, Rajesh K. Gupta, C. L. Liu
HPCN
1997
Springer
15 years 10 months ago
Parallel Simulation of Ion Recombination in Nonpolar Liquids
Abstract. Ion recombination in nonpolar liquids is an important problem in radiation chemistry. We have designed and implemented a parallel Monte Carlo simulation for this computat...
Frank J. Seinstra, Henri E. Bal, Hans J. W. Spoeld...
EURODAC
1994
IEEE
120views VHDL» more  EURODAC 1994»
15 years 10 months ago
Planar-DME: improved planar zero-skew clock routing with minimum pathlength delay
Clock routing has become a critical issue in the layout design of high-performance systems. We show that the two passes bottom-up and top-down of the DME algorithm 2, 3, 4, 8 can ...
Chung-Wen Albert Tsao, Andrew B. Kahng
DAC
1994
ACM
15 years 10 months ago
Loop Pipelining for Scheduling Multi-Dimensional Systems via Rotation
Multi-dimensional(MD) systems are widely used in scienti c applications such as image processing, geophysical signal processing and uid dynamics. Earlier scheduling methods in syn...
Nelson L. Passos, Edwin Hsing-Mean Sha, Steven C. ...
ANCS
2007
ACM
15 years 10 months ago
Design of adaptive communication channel buffers for low-power area-efficient network-on-chip architecture
Network-on-Chip (NoC) architectures provide a scalable solution to the wire delay constraints in deep submicron VLSI designs. Recent research into the optimization of NoC architec...
Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri