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VTS
2002
IEEE
120views Hardware» more  VTS 2002»
15 years 11 months ago
Software-Based Weighted Random Testing for IP Cores in Bus-Based Programmable SoCs
We present a software-based weighted random pattern scheme for testing delay faults in IP cores of programmable SoCs. We describe a method for determining static and transition pr...
Madhu K. Iyer, Kwang-Ting Cheng
LCPC
2009
Springer
15 years 11 months ago
A Communication Framework for Fault-Tolerant Parallel Execution
PC grids represent massive computation capacity at a low cost, but are challenging to employ for parallel computing because of variable and unpredictable performance and availabili...
Nagarajan Kanna, Jaspal Subhlok, Edgar Gabriel, Es...
ICFP
2000
ACM
15 years 11 months ago
The duality of computation
We review the close relationship between abstract machines for (call-by-name or call-by-value) λ-calculi (extended with Felleisen’s C) and sequent calculus, reintroducing on the...
Pierre-Louis Curien, Hugo Herbelin
IFIP
1992
Springer
15 years 11 months ago
Intelligent Access to Data and Knowledge Bases via User's Topics of Interest
Retrieving relevant information in Data and Knowledge Bases containing a large number of di erent types of information is a non trivial problem. That is the reason why, in areas l...
Sylvie Cazalens, Robert Demolombe
ICLP
1989
Springer
15 years 11 months ago
A Simple Code Improvement Scheme for Prolog
The generation of efficient code for Prolog programs requires sophisticated code transformation and optimization systems. Much of the recent work in this area has focussed on hig...
Saumya K. Debray
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