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PACS
2004
Springer
115views Hardware» more  PACS 2004»
16 years 3 days ago
Reducing Delay and Power Consumption of the Wakeup Logic Through Instruction Packing and Tag Memoization
Dynamic instruction scheduling logic is one of the most critical components of modern superscalar microprocessors, both from the delay and power dissipation standpoints. The delay ...
Joseph J. Sharkey, Dmitry Ponomarev, Kanad Ghose, ...
TCAD
2008
101views more  TCAD 2008»
15 years 6 months ago
Using Field-Repairable Control Logic to Correct Design Errors in Microprocessors
Functional correctness is a vital attribute of any hardware design. Unfortunately, due to extremely complex architectures, widespread components, such as microprocessors, are often...
Ilya Wagner, Valeria Bertacco, Todd M. Austin
CORR
2004
Springer
137views Education» more  CORR 2004»
15 years 6 months ago
Implementation of Logical Functions in the Game of Life
: The Game of Life cellular automaton is a classical example of a massively parallel collision-based computing device. The automaton exhibits mobile patterns, gliders, and generato...
Jean-Philippe Rennard
ISCA
1999
IEEE
87views Hardware» more  ISCA 1999»
15 years 11 months ago
Dynamic Vectorization: A Mechanism for Exploiting Far-Flung ILP in Ordinary Programs
Several ILP limit studies indicate the presence of considerable ILP across dynamically far-apart instructions in program execution. This paper proposes a hardware mechanism, dynam...
Sriram Vajapeyam, P. J. Joseph, Tulika Mitra
JAIR
2010
145views more  JAIR 2010»
15 years 5 months ago
On Action Theory Change
As historically acknowledged in the Reasoning about Actions and Change community, intuitiveness of a logical domain description cannot be fully automated. Moreover, like any other...
Ivan José Varzinczak