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APN
2001
Springer
15 years 10 months ago
Partial Order Verification of Programmable Logic Controllers
We address the verification of programmable logic controllers (PLC). In our approach, a PLC program is translated into a special type of colored Petri net, a so-called register net...
Peter Deussen
AAAI
1990
15 years 8 months ago
Logical Task Modelling for Man-Machine Dialogue
To design a task-independent dialogue system, we present a task-oriented dialogue analysis in terms of finding the referents of definite descriptions and we show how this analysis...
M. David Sadek
APAL
2006
107views more  APAL 2006»
15 years 7 months ago
Frege systems for extensible modal logics
By a well-known result of Cook and Reckhow [4, 12], all Frege systems for the Classical Propositional Calculus (CPC) are polynomially equivalent. Mints and Kojevnikov [11] have re...
Emil Jerábek
DATE
2005
IEEE
158views Hardware» more  DATE 2005»
16 years 21 days ago
Modeling and Analysis of Loading Effect in Leakage of Nano-Scaled Bulk-CMOS Logic Circuits
In nanometer scaled CMOS devices significant increase in the subthreshold, the gate and the reverse biased junction band-toband-tunneling (BTBT) leakage, results in the large incr...
Saibal Mukhopadhyay, Swarup Bhunia, Kaushik Roy
ENTCS
2008
99views more  ENTCS 2008»
15 years 7 months ago
Specifying Properties of Concurrent Computations in CLF
CLF (the Concurrent Logical Framework) is a language for specifying and reasoning about concurrent systems. Its most significant feature is the first-class representation of concu...
Kevin Watkins, Iliano Cervesato, Frank Pfenning, D...