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ASPLOS
2008
ACM
15 years 8 months ago
Feedback-driven threading: power-efficient and high-performance execution of multi-threaded workloads on CMPs
Extracting high-performance from the emerging Chip Multiprocessors (CMPs) requires that the application be divided into multiple threads. Each thread executes on a separate core t...
M. Aater Suleman, Moinuddin K. Qureshi, Yale N. Pa...
DSN
2006
IEEE
16 years 14 days ago
Evaluating the Performability of Systems with Background Jobs
As most computer systems are expected to remain operational 24 hours a day, 7 days a week, they must complete maintenance work while in operation. This work is in addition to the ...
Qi Zhang, Ningfang Mi, Evgenia Smirni, Alma Riska,...
INFOCOM
2005
IEEE
15 years 12 months ago
Dependency isolation for thread-based multi-tier Internet services
— Multi-tier Internet service clusters often contain complex calling dependencies among service components spreading across cluster nodes. Without proper handling, partial failur...
Lingkun Chu, Kai Shen, Hong Tang, Tao Yang, Jingyu...
IFE
2010
161views more  IFE 2010»
15 years 4 months ago
Adaptive estimation and prediction of power and performance in high performance computing
Power consumption has become an increasingly important constraint in high-performancecomputing systems, shifting the focus from peak performance towards improving power efficiency...
Reza Zamani, Ahmad Afsahi
MICRO
2000
IEEE
86views Hardware» more  MICRO 2000»
15 years 10 months ago
On pipelining dynamic instruction scheduling logic
A machine’s performance is the product of its IPC (Instructions Per Cycle) and clock frequency. Recently, Palacharla, Jouppi, and Smith [3] warned that the dynamic instruction s...
Jared Stark, Mary D. Brown, Yale N. Patt